AI · SEMICONDUCTOR · FACT CHECK
SKD WIREMostly True
As AI semiconductor makers push logic and memory features toward ever-smaller dimensions, a single patterning process using dry solutions is being presented as a way to overcome the limits of conventional miniaturization, with a final assessment of the claim rating it "mostly true" after review of 12 primary sources, including documentation of 18nm-pitch Ru lines produced via dry methanol exposure (DME).
Shrinking feature sizes in advanced semiconductor nodes has traditionally relied on multi-patterning schemes, which multiply process steps and costs as dimensions contract. Evidence cited in support of the claim includes demonstration of ruthenium (Ru) lines at an 18nm pitch formed through a DME-based process, indicating that dry solution methods can achieve fine-pitch patterning in a single pass.
The core of the claim — that a "single patterning process" leveraging "dry solutions" can break through AI semiconductor miniaturization limits — rests on the documented 18nm pitch DME Ru line result. This suggests dry solution deposition and patterning can serve as an alternative to repeated litho-etch cycles at advanced nodes relevant to AI chips.
The scope of the claim remains bounded by the available evidence: the reviewed documentation centers on the 18nm-pitch Ru demonstration, and broader production-scale adoption or qualification at major AI chipmakers was not part of the reviewed material. Whether the approach extends beyond this demonstration to full manufacturing integration remains unconfirmed.
The claim was rated "mostly true": the dry solution-based single patterning process is supported by the 18nm-pitch Ru line evidence as a path past miniaturization limits, though its demonstrated scope does not yet cover industry-wide deployment.
