True
NVIDIA has stated that its next-generation HBM configuration delivers up to 30% more memory bandwidth than standard HBM4E, cuts HBM power consumption by 15%, and frees up as much as 25% more usable compute die area on the processing unit. The figures were presented in materials published by the company.
According to NVIDIA's claims, the memory bandwidth advantage over standard HBM4E reaches up to 30%, an improvement aimed at feeding data more quickly to GPU workloads such as large language model (LLM) training and inference.
On the power side, the company says HBM power consumption is 15% lower than with standard HBM4E. Memory power has become an increasingly significant share of overall system consumption in AI data centers, where stacks of HBM sit close to the compute die.
The third claimed gain concerns the package itself: up to 25% more usable compute die area on the processing unit. Because HBM occupies space within the package assembly, changes to how memory is integrated can affect how much area remains available for compute logic.
The comparison is framed against HBM4E, the evolution of the HBM4 generation now being adopted across the AI accelerator market. NVIDIA's presentation positions the claimed improvements as headline deltas relative to that standard, covering bandwidth, efficiency and area utilization.
The claim sheet cites a company-published image document as the basis for the figures. Independent third-party measurements of bandwidth, power consumption or die area gains are not cited in the materials, so the numbers should be read as the company's own claims rather than independently benchmarked results.
If realized as described, the combination of higher bandwidth, lower memory power and greater usable compute area would affect the design of AI accelerators at the package level, where trade-offs between HBM stacking, interposers and compute silicon are most acute. For the memory industry — including Korean suppliers such as Samsung and SK hynix, which compete in the HBM segment — such deltas shape the requirements for future HBM generations and their integration into accelerator packages.
NVIDIA's presentation of the three figures — up to 30% more memory bandwidth, 15% lower HBM power consumption, and up to 25% more usable compute die area versus standard HBM4E — stands as published by the company. The verdict: True.